![]() ![]() We design the hardware and ISA support for SIMDRAM framework to (1) address key system integration challenges, and (2) allow programmers to employ new SIMDRAM operations without hardware changes. The third step uses the SIMDRAM control unit located inside the memory controller to manage the computation of the operation from start to end, by executing the DRAM commands generated in the second step of the framework. The second step allocates DRAM rows that are reserved for computation to the operation’s input and output operands, and generates the required sequence of DRAM commands to perform the MAJ/NOT implementation of the desired operation in DRAM. The first step builds an efficient MAJ/NOT representation of a given desired operation. ![]() The SIMDRAM framework comprises three key steps. In this paper, we propose SIMDRAM, a flexible general-purpose processing-using-DRAM framework that (1) enables the efficient implementation of complex operations, and (2) provides a flexible mechanism tosupport the implementation of arbitrary user-defined operations. However, in order to enable full adoption of processing-using-DRAM, it is necessary to provide support for more complex operations. Processing-using-DRAM has been proposed for a limited set of basic operations (i.e., logic operations, addition).
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